1. Field of the Invention
The present invention relates to ringlets and, more particularly, to a method of achieving deterministic latency for packets in a ringlet
2. Background Information
Ringlets lack the ability to broadcast information at the same time to all devices or nodes coupled to the ringlet. Information in the form of electrical signals is passed around the ringlet from one device or node to another in a sequential fashion. Because a ringlet may have more than one device or node simultaneously transferring information to the ringlet, there is a large random component to the delay of the delivery of information in the form of electronic signals from one device or node to another.
Typically, the transmitting node includes a fixed size storage unit or buffer having memory locations to store incoming signals. Typically, the size of this storage buffer is chosen to match the largest amount of time that the node could be transferring its own data to the ringlet while simultaneously receiving data from a previous node coupled to the ringlet. However, the node could originate different amounts of information at different times and the relationship between when the incoming data is arriving and when a node is originating data is not fixed. A need therefore exists for an approach to ringlets that addresses these problems.
Briefly, in accordance with one embodiment of the invention, a method of using a bypass buffer in a node coupled to a ringlet includes the steps of: writing a packet of binary digital signals on the ringlet into the bypass buffer; and retaining the packet of binary digital signals in the bypass buffer for a predetermined amount of time before transferring the packet to the ringlet.
Briefly, in accordance with another embodiment, a node to be coupled to a ringlet includes: a transmit buffer and a receive buffer. The transmit and receive buffers are coupled in a configuration to transfer binary digital signals between the node and the ringlet via the transmit and receive buffers. The configuration further includes a bypass buffer to temporarily queue binary digital signals passing through the node. The bypass buffer is further coupled in the configuration to retain a packet of binary digital signals for a predetermined amount of time before transferring the packet to the ringlet.
Briefly, in accordance with yet one more embodiment, a node to be coupled to a ringlet includes a bypass buffer. The bypass buffer is able to be coupled to the ringlet to temporarily queue data signals from the ringlet. Digital logic circuitry coupled to the bypass buffer includes a head pointer for the bypass buffer. The bypass buffer is coupled to the head pointer to retain a packet of data signals for a predetermined amount of time before transferring the packet to the ringlet.